About Me
I am a dedicated Electronics and Communication Engineering student at Lovely Professional University. I specialize in Digital System Design and Advanced Computer Networking, with a strong foundation in Verilog HDL and routing protocols.
I am passionate about hardware and software integration, bringing leadership and problem-solving skills to complex engineering projects.
Education
Lovely Professional University
B.Tech - Electronics and Communication Engineering | CGPA: 6.5
Aug 2023 - Present
Aditya Junior College
Intermediate | CGPA: 7.5
Jun 2021 - Mar 2023
Keshava Reddy Smart School
SSC | GPA: 10
Jul 2020 - May 2021
Technical Skills
Languages
Python, C, C++
Hardware & Tools
Verilog, Cisco Packet Tracer, Multisim, Git
Networking
EIGRP, RIP, VLANs, Routing & Switching
Professional Training
NextGen Networking - Summer Internship
Lovely Professional University | Jun 2025 - Jul 2025- ▹ Worked on EIGRP configuration in a triangular topology using Cisco Packet Tracer.
- ▹ Gained hands-on experience in dynamic routing protocols, subnetting, and router configuration.
- ▹ Enhanced troubleshooting skills using ping, show ip route, and show running-config.
Featured Projects
DEC 2025
Vending Machine Controller
Created an FSM-based vending machine using Verilog HDL, handling coin inputs, product selection, and state transitions. Developed modules for coin validation, balance calculation, and product dispensing. Simulated and verified functionality using testbenches to ensure reliability.
NOV 2025
Multi-Level ASK Switching
Implemented a multi-level ASK scheme to transmit digital data using discrete amplitude levels. Built modulation/demodulation blocks to encode multiple bits per symbol. Analyzed signal behavior under noise and compared BER performance.
MAR 2025
2-bit Digital Comparator (CMOS vs PTL)
Designed and simulated a 2-bit comparator using CMOS and Pass Transistor Logic (PTL). Compared performance, power efficiency, and transistor count to highlight the advantages of PTL.
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anubhavammu2005@gmail.com
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